addR-typeALU
add rd, rs1, rs2
rd = rs1 + rs2
opcode: 0110011funct3: 000funct7: 0000000
subR-typeALU
sub rd, rs1, rs2
rd = rs1 - rs2
opcode: 0110011funct3: 000funct7: 0100000
andR-typeALU
and rd, rs1, rs2
rd = rs1 & rs2
opcode: 0110011funct3: 111funct7: 0000000
orR-typeALU
or rd, rs1, rs2
rd = rs1 | rs2
opcode: 0110011funct3: 110funct7: 0000000
xorR-typeALU
xor rd, rs1, rs2
rd = rs1 ^ rs2
opcode: 0110011funct3: 100funct7: 0000000
addiI-typeALU
addi rd, rs1, imm
rd = rs1 + imm
opcode: 0010011funct3: 000
andiI-typeALU
andi rd, rs1, imm
rd = rs1 & imm
opcode: 0010011funct3: 111
oriI-typeALU
ori rd, rs1, imm
rd = rs1 | imm
opcode: 0010011funct3: 110
xoriI-typeALU
xori rd, rs1, imm
rd = rs1 ^ imm
opcode: 0010011funct3: 100
lbI-typeLoad
lb rd, imm(rs1)
Load signed byte from memory
opcode: 0000011funct3: 000
lhI-typeLoad
lh rd, imm(rs1)
Load signed halfword from memory
opcode: 0000011funct3: 001
lwI-typeLoad
lw rd, imm(rs1)
Load word from memory
opcode: 0000011funct3: 010
lbuI-typeLoad
lbu rd, imm(rs1)
Load unsigned byte from memory
opcode: 0000011funct3: 100
lhuI-typeLoad
lhu rd, imm(rs1)
Load unsigned halfword from memory
opcode: 0000011funct3: 101
sbS-typeStore
sb rs2, imm(rs1)
Store low byte of rs2 to memory
opcode: 0100011funct3: 000
shS-typeStore
sh rs2, imm(rs1)
Store low halfword of rs2 to memory
opcode: 0100011funct3: 001
swS-typeStore
sw rs2, imm(rs1)
Store word of rs2 to memory
opcode: 0100011funct3: 010
beqB-typeBranch
beq rs1, rs2, imm
Branch if rs1 == rs2
opcode: 1100011funct3: 000
bneB-typeBranch
bne rs1, rs2, imm
Branch if rs1 != rs2
opcode: 1100011funct3: 001
bltB-typeBranch
blt rs1, rs2, imm
Branch if rs1 < rs2 (signed)
opcode: 1100011funct3: 100
bgeB-typeBranch
bge rs1, rs2, imm
Branch if rs1 >= rs2 (signed)
opcode: 1100011funct3: 101